| 标 | 路径 | 年 | 题目（缩） | 作者（缩） | 发表（缩） | 引用 | 团队 | 概括 | 题目 |
| Algo | 2010 | heap_alloc | wang | cgo | 16 | 武成岗 | On Improving Heap Memory Layout by Dynamic Pool Allocation | ||
| Algo | 2010 | mem_bandwidth_sched | xu | pact | 67 | 武成岗 | On Mitigating Memory Bandwidth Contention through Bandwidth-Aware Scheduling | ||
| Algo | 2011 | heap_alloc | 王振江 | 计算机学报 | 1 | 武成岗 | 提高堆数据局部性的动态池分配技术 | ||
| Algo | 2012 | on_the_fly_heap_object_split | wang | taco | 11 | 武成岗 | On-the-fly Structure Splitting for Heap Objects | ||
| Algo | 2012 | fair_sched | xu | sigmetrics | 23 | 武成岗 | Providing Fairness on Shared-Memory Multiprocessors via Process Scheduling | ||
| Algo | 2013 | identify_sync | yuan | europar | 6 | 武成岗 | Synchronization Identification through On-the-fly Test | ||
| Algo | 2014 | calling_context_encode | li | cgo | 5 | 武成岗 | Dynamic and Adaptive Calling Context Encoding | ||
| N | Algo | 2014 | eflags | wwwang | 8 | 武成岗 | A pattern translation method for flags in binary translation | ||
| Algo | 2014 | locate_share_mem_bug | wwwang | ase | 12 | 武成岗 | Localization of Concurrency Bugs Using Shared Memory Access Pairs | ||
| Algo | 2015 | fair_sched | wu | tpds | 13 | 武成岗 | FPS: A Fair-Progress Process Scheduling Policy on Shared-Memory Multiprocessors | ||
| Algo | 2015 | reproduce_concurrency_bug | yuan | icse | 9 | 武成岗 | ReCBuLC: Reproducing Concurrency Bugs Using Local Clocks | ||
| Algo | 2018 | reproduce_concurrency_bug | wang | tse | 1 | 武成岗 | Using Local Clocks to Reproduce Concurrency Bugs | ||
| analysis | 2017 | 并行程序 | 黄小敏 | master_thesis | lx | ||||
| W | analysis | 2019 | x64_inst_statistics | akshintala | systor | 3 | unc | x86-64 Instruction Usage among C/C++ Applications | |
| Arch/HT | 2005 | cell | kahle | ibmjrd | 1093 | ||||
| Arch/HT | 2007 | cell_boradband | johns | ibmjrd | 105 | ||||
| Arch/HT | 2012 | process_migration | devuyst | asplos | 83 | ||||
| Arch/HT | 2014 | isa_explore | venkat | isca | 112 | ||||
| Arch/HT | 2015 | overview | mitra | jip | 15 | ||||
| Arch/HT | 2016 | process_migration | lyerly | mars | 5 | ||||
| Arch/HT | 2018 | process_migration | venkat | doc_thesis | 5 | ||||
| Arch/HT | 2019 | composite_isa | venkat | hpca | 17 | Composite-ISA Cores: Enabling Multi-ISA Heterogeneity Using a Single ISA | |||
| Arch/HT | 2020 | byoc_framework | balkind | asplos | 3 | ||||
| Arch/reconf | 1997 | chimaera | hauck | fccm | 461 | The Chimaera Reconfigurable Functional Unit | |||
| Arch/reconf | 2004 | conf_acc | clark | micro | 186 | Application-Specific Processing on a General-Purpose Core via Transparent Instruction Set Customization | |||
| ? | Arch/reconf | 2005 | java | beck | ipdps | 4 | ufrgs | Application of Binary Translation to Java Reconfigurable Architectures | |
| ? | Arch/reconf | 2005 | java | beck | dac | 39 | ufrgs | Dynamic Reconfiguration with Binary Translation: Breaking the ILP Barrier with Software Compatibilit | |
| Arch/reconf | 2008 | reconf_acc | beck | date | 97 | ufrgs | Transparent Reconfigurable Acceleration for Heterogeneous Embedded Applications | ||
| Arch/reconf | 2010 | reconf_acc | beck | 32 | ufrgs | Dynamic Reconfigurable Architectures and Transparent Optimization Techniques | |||
| Arch/VLIW | 1981 | trace_scheduling | fisher | tc | 1333 | ||||
| Arch/VLIW | 1984 | vliw_intro | fisher | sigplan | 102 | ||||
| Arch/VLIW | 1988 | vliw_trace_compiler | colwell | tc | |||||
| Arch/VLIW | 1988 | software_pipeline | lam | sigplan | 1107 | ||||
| BT | 2010 | qemu_opt_wine | 刘奇 | doc_thesis | lx | 二进制兼容系统的设计实现与性能优化 | |||
| BT | 2020 | bt_to_acc | knorst | sbcci | 0 | ufrgs | Unlocking the Full Potential of Heterogeneous Accelerators by Using a Hybrid Multi-Target Binary Translator | ||
| BT/algo | 2003 | delay_slot | ramsey | toplas | 11 | sun | A Transformational Approach to Binary Translation of Delayed Branches | ||
| BT/algo | 2004 | bitra_digital_bridge | 马湘宁 | doc_thesis | 武成岗 | 二进制翻译关键技术研究 | |||
| BT/algo/code_cache | 2005 | cache | 谢海斌 | 计算机工程 | 0 | 武成岗 | 动态二进制翻译中的代码Cache管理策略 | ||
| BT/algo/flags | 2005 | eflags | 马湘宁 | 计研发 | 2 | 武成岗 | 二进制翻译中的标志位优化技术 | ||
| BT/algo | 2006 | simd_opt | li | cgo | 31 | intel | Optimizing Dynamic Binary Translation for SIMD Instructions | ||
| BT/algo/excp | 2006 | excp_handle | 唐锋 | 计研发 | 1 | 武成岗 | 二进制翻译应用级异常处理 | ||
| BT/algo | 2006 | lib | 杨浩 | 计研发 | 0 | 武成岗 | 二进制翻译中的库函数处理 | ||
| BT/algo/flags | 2007 | eflags_dyn | 唐锋 | 软件学报 | 1 | 武成岗 | 基于动态反馈的标志位线性分析算法 | ||
| BT/algo | 2008 | cam | li | amasbt | 武成岗 | A New Replacement Algorithm on Content Associative Memory for Binary Translation System | |||
| BT/algo | 2008 | prefetch_opt | ukezono | acsac | 1 | jaist | Dynamic Binary Code Translation for Data Prefetch Optimization | ||
| BT/algo/indirect_jump | 2008 | branch | 陈龙 | 计研发 | 1 | 武成岗 | 二进制翻译中解析多目标分支语句的图匹配方法 | ||
| BT/algo/indirect_jump | 2010 | indirect_jump | payer | systor | 23 | ethz | table driven不是亮点？ | Generating low-overhead dynamic binary translators | |
| BT/algo/reg | 2011 | stack_var_to_register | li | cgo | 9 | 武成岗 | Dynamic Register Promotion of Stack Variables | ||
| BT/algo | 2011 | misaligned_access | li | taco | 0 | 武成岗 | Efficient and Effective Misaligned Data Access Handling in a Dynamic Binary Translation System | ||
| BT/algo | 2011 | simd_opt | michel | date | 21 | tima | Speeding-up SIMD instructions Dynamic Binary Translation in Embedded Processor Simulation | ||
| BT/algo | 2011 | loop_nest_detect | sato | cf | 17 | jaist | On-the-fly detection of precise loop nests across procedures on a dynamic binary translation system | ||
| BT/algo/indirect_jump | 2012 | indirect_jump_sys | koju | systor | 8 | ibm | Optimizing indirect branches in a system-level dynamic binary translator | ||
| BT/algo | 2012 | multicore_opt | kyle | lctes | 9 | ed | Efficiently parallelizing instruction set simulation of embedded multi-core processors using region-based just-in-time dynamic binary translation | ||
| BT/algo | 2012 | trans_vliw | michel | 7 | tima | Fast Simulation of Systems Embedding VLIW Processors | |||
| BT/algo | 2012 | sys_background_opt | sokolov | pcs | 2 | Background optimization in full system binary translation | |||
| W | BT/algo | 2015 | post_opt | zhang | cgo | 17 | lx | HERMES: A Fast Cross-ISA Binary Translator with Post-Optimization | |
| BT/algo/indirect_jump | 2016 | static_identify_jump_target | federico | cases | 9 | A jump-target identification method for multi-architecturestatic binary translation | |||
| BT/algo/code_cache | 2016 | code_cache_persistent | wwwang | usenix | 15 | umn | 这也能水 | A General Persistent Code Caching Framework for Dynamic Binary Translation (DBT) | |
| BT/algo | 2017 | plugin | gritschneder | rsp | 10 | tum | The Extendable Translating Instruction Set Simulator (ETISS) interlinked with an MDA Framework for fast RISC Prototyping | ||
| BT/algo | 2017 | trans_vliw | michel | tcad | 1 | tima | Dynamic Binary Translation of VLIW Codes on Scalar Architectures | ||
| BT/algo/flags | 2017 | eflags_by_dbg_hw | salgado | esl | 5 | uminho | Condition Codes Evaluation on Dynamic Binary Translation for Embedded Platforms | ||
| BT/algo | 2019 | opt_decision | park | tecs | 0 | umich | Multi-objective Exploration for Practical Optimization Decisions in Binary Translation | ||
| BT/algo | 2021 | inline_helper | wwwang | iccc | 1 | uga | 这也能水 | Helper function inlining in dynamic binary translation | |
| BT/algo/bt_rules | 1998 | semantic_spec_lang | cifuentes | iwpc | 57 | uq | Specifying the Semantics of Machine Instructions | ||
| BT/algo/bt_rules | 2006 | peephole_superopt | bansal | asplos | 134 | stanford | Automatic Generation of Peephole Superoptimizers | ||
| W | BT/algo/bt_rules | 2008 | peephole_superopt | bansal | osdi | 78 | stanford | Binary Translation Using Peephole Superoptimizers | |
| BT/algo/bt_rules | 2010 | isamap | souza | amasbt | 8 | unicamp | ISAMAP: Instruction Mapping Driven by Dynamic Binary Translation | ||
| BT/algo/bt_rules | 2017 | isa_desc_lang | bezzubikov | ispras | 2 | ispras | 提出一个isa描述语言 | Automatic Dynamic Binary Translator Generation from Instruction Set Description | |
| BT/algo/bt_rules | 2018 | learn | wwwang | asplos | 11 | umn | learn from compiler | Enhancing Cross-ISA DBT Through Automatically Learned Translation Rules | |
| BT/algo/bt_rules | 2019 | learn | song | usenix | 5 | 复旦 | Unleashing the Power of Learning: An Enhanced Learning-Based Approach for Dynamic Binary Translation | ||
| BT/algo/bt_rules | 2020 | learn | jiang | micro | 3 | 复旦 | More with Less - Deriving More Translation Rules with Less Training Data for DBTs Using Parameterization | ||
| BT/algo/offload | 2010 | distribit | guan | hpdc | 5 | 上交 | DistriBit: A Distributed Dynamic Binary Translator System for Thin Client Computing | ||
| BT/algo/offload | 2011 | jit_task_farm | bohm | pldi | 56 | ed | Generalized Just-In-Time Trace Compilation using a Parallel Task Farm in a Dynamic Binary Translator | ||
| BT/algo/offload | 2017 | by_hqemu | wwwang | mobisys | 20 | umn | Enabling Cross-ISA Offloading for COTS Binaries | ||
| BT/algo/reg | 2004 | post_realloc | zhang | emsoft | 8 | gatech | Binary translation to improve energy efficiency through post-pass register re-allocation | ||
| X | BT/algo/reg | 2014 | alloc | choi | 0 | cbnu | 题不对文 | Chungbuk National University | |
| BT/algo/smc | 2015 | detect | hawkins | cgo | 24 | Optimizing Binary Translation of Dynamically Generated Code | |||
| BT/algo/trace | 1994 | opt_profiling_tracing | ball | toplas | 580 | ||||
| BT/algo/trace | 1996 | efficient_path_profiling | ball | micro | 642 | ||||
| BT/algo/trace | 2000 | net | duesterwald | asplos | 141 | ||||
| BT/algo/trace | 2005 | lei_net | hiniker | micro | 39 | ||||
| BT/algo/trace | 2005 | edge_profile | 白童心 | 计算机工程 | 2 | 武成岗 | 优化动态二进制翻译器DigitalBridge | ||
| BT/algo/trace | 2009 | large_tb | jones | hipeac | 49 | ed | High Speed CPU Simulation Using LTU Dynamic Binary Translation | ||
| BT/algo/trace | 2010 | saving_space | porto | amasbt | 7 | unicamp | record/replay trace, space--, time++ | Trace Execution Automata in Dynamic Binary Translation | |
| BT/algo | 2012 | dynamic_static | guan | jsa | 5 | inter-egde profiling, software cache layout | |||
| BT/algo/trace | 2014 | region_based | spink | lctes | 9 | ed | Efficient code generation in a region-based dynamic binary translator | ||
| BT/analysis | 2008 | cache_perf | alvarez | 13 | virginia | Evaluating the Impact of Dynamic Binary Translation Systems on Hardware Cache Performance | |||
| W | BT/analysis | 2008 | cold_code | attrot | amasbt | 1 | Cold Code Analysis | ||
| BT/perf | 2008 | overhead | borin | amasbt | 8 | Characterization of DBT Overhead | |||
| BT/perf | 2009 | overhead | borin | iiswc | 26 | Characterization of DBT Overhead | |||
| BT/analysis | 2008 | security | chen | amasbt | 0 | Guest & host security | Impact of Dynamic Binary Translators on Security | ||
| W | BT/analysis | 2008 | portable_interpretor | mihocka | amasbt | 40 | Virtualization Without Direct Execution or Jitting: Designing a Portable Virtual Machine Infrastructure | ||
| BT/analysis/mem | 2009 | eval_misaligned_access | li | cgo | 4 | An Evaluation of Misaligned Data Access Handling Mechanisms in Dynamic Binary Translation Systems | |||
| W | BT/analysis/mem | 2010 | mem_bottleneck | kim | amasbt | 5 | columbia | Computation vs. Memory Systems: Pinning Down Accelerator Bottlenecks | |
| BT/analysis | 2010 | atomic | neelakantam | asplos | 20 | illinois | A real system evaluation of hardware atomicity for software speculation | ||
| BT/analysis | 2011 | hw_sw | pavlou | amasbt | 13 | upc | DARCO: Infrastructure for Research on HW/SW co-designed Virtual Machines | ||
| BT/analysis | 2014 | simulators_harm | nowatki | 19 | |||||
| BT/analysis | 2015 | 虚拟机研究 | 靳国杰 | post_thesis | lx | ||||
| BT/analysis | 2018 | atomic | oni | icias | 0 | Fine-Grained Overhead Analysis Utilizing Atomic Instructions for Cross-ISA Dynamic Binary Translation on Multicore Processor | |||
| BT/analysis | 2020 | perfdbt | wu | iccd | 2 | ||||
| BT/application | 2013 | detect_unread_mem | eyolfson | rv | 0 | waterloo | Detecting Unread Memory Using Dynamic Binary Translation | ||
| BT/application | 2013 | hw_fault_sim | guglielmo | ets | 5 | univr | Efficient Fault Simulation through Dynamic Binary Translation for Dependability Analysis of Embedded Software | ||
| BT/dynamic | 2000 | uqdbt | ung | wcre | 4 | uq | Dynamic re-engineering of binary code with run-time feedbacks | ||
| BT/dynamic | 2000 | uqdbt | ung | 105 | uq | Machine-Adaptable Dynamic Binary Translation | |||
| BT/dynamic | 2000 | aries | zheng | computer | 125 | hp | PA-RISC to IA-64: Transparent Execution, No Recompilation | ||
| BT/dynamic | 2007 | hdtrans | sridhar | carn | 34 | jhu | HDTrans: A Low-Overhead Dynamic Translator | ||
| BT/perf | 2009 | challenges_in_arm | moore | lctes | 33 | pitt | Addressing the challenges of DBT for the ARM architecture | ||
| BT/dynamic | 2010 | cycle_accurate | bohm | 39 | ed | Cycle-accurate performance modelling in an ultra-fast just-in-time dynamic binary translation instruction set simulator | |||
| BT/dynamic | 2011 | harmonia | ottoni | cf | 19 | intel | Harmonia: A Transparent, Efficient, and Harmonious Dynamic Binary Translator Targeting the Intel Architecture | ||
| ? | BT/dynamic | 2016 | dbto | ooi | 2 | hqemu比qemu慢60倍? | Dual-Engine Corss-ISA DBTO Technique utilising MultiThreaded Support for Multicore Processor System | ||
| BT/dynamic | 2017 | mambox64 | dantras | pldi | 18 | manchester | arm32 => arm64 | ||
| BT/dynamic | 2017 | hypermambox64 | dantras | vee | 9 | manchester | HyperMAMBO-X64: Using virtualization to support high-performance transparent binary translation | ||
| BT/HQEMU | 2012 | hqemu | hong | cgo | 88 | ||||
| BT/HQEMU | 2013 | hqemu | hong | doc_thesis | 8 | ||||
| BT/HQEMU | 2014 | hqemu | hong | tpds | 8 | Efficient and Retargetable Dynamic Binary Translation on Multicores | |||
| BT/HW | 2003 | indirect_jump | kim | micro | 44 | ret addr stack, jmp target $ | Hardware Support for Control Transfers in Code Caches | ||
| W | ISA/Fusion/NonExec | 2004 | bt_fused_isa | hu | cgo | 43 | wisc | Using Dynamic Binary Translation to Fuse Dependent Instructions | |
| W | BT/HW | 2006 | startup_opt | hu | isca | 29 | wisc | Reducing Startup Time in Co-Designed Virtual Machines | |
| ? | BT/HW | 2008 | coprocessor | li | amasbt | 3 | 上交 | dedicated coproc (FPGA) | A hardware/software co-designed virtual machine to support multiple ISAs |
| BT/HW | 2010 | 一核执行一核翻译fpga | 徐帆 | master_thesis | 0 | 国防科大 | 软硬协同动态二进制翻译系统设计与实现 | ||
| BT/HW | 2012 | 控制转移 | 郝守青 | 高通 | 0 | 龙芯 | 二进制翻译控制转移的软硬件协同设计 | ||
| ? | BT/HW | 2009 | godson3_x86_emu | hu | 9 | lx | Efficient Binary Translation System with Low Hardware Cost | ||
| ? | BT/HW | 2009 | godson3_x86_emu | hu | micro | 84 | lx | GODSON -3: A SCALABLE MULTICORE RISC PROCESSOR WITH X86 EMULATION | |
| BT/HW | 2012 | cam | he | 3 | ndsc | Hardware/software co-design of Dynamic Binary Translation in X86 Emulation | |||
| BT/HW | 2015 | 融合指令集 | 胡伟武 | 中国科学 | lx | ||||
| BT/HW | 2019 | peripheral_acc | gomes | icit | 0 | uminho | Non-Intrusive Hardware Acceleration for Dynamic Binary Translation in Embedded Systems | ||
| BT/HW/codeCache | 2007 | scratchpad_mem | baiocchi | cases | 20 | pitt | Fragment Cache Management for Dynamic Binary Translators in Embedded Systems with Scratchpad | ||
| BT/HW/codeCache | 2009 | scratchpad_mem | baiocchi | dac | 12 | pitt | Heterogeneous code cache: using scratchpad and main memory in dynamic binary translators | ||
| BT/HW/codeCache | 2012 | scratchpad_mem | baiocchi | tecs | 6 | pitt | Enabling dynamic binary translation in embedded systems with scratchpad memory | ||
| BT/HW/codeCache | 2018 | hw_assist | salgado | etfa | 2 | uminho | A Hardware-assisted Translation Cache for Dynamic Binary Translation in Embedded Systems | ||
| BT/HW/reconf | 2005 | mem_opt | oh | iccad | 2 | kaist | Memory Access Optimization of Dynamic Binary Translation for Reconfigurable Architectures | ||
| BT/HW/reconf | 2007 | trans_binary_to_fpga | mittal | tvlsi | 16 | illinois | An Overview of a Compiler for Mapping Software Binaries to Hardware | ||
| BT/HW/reconf | 2008 | mem_opt_loop_pipeline | oh | tcad | 5 | Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration | |||
| BT/HW/reconf | 2008 | trans_binary_to_fpga | vahid | computer | 91 | ucr | Warp Processing: Dynamic Translation of Binaries to FPGA Circuits | ||
| BT/HW/reconf | 2013 | multi_isa | capella | 1 | ufrgs | A Multiple-ISA Reconfigurable Architecture | |||
| ? | BT/HW/reconf | 2013 | x86_mips_reconf | junior | jsa | 4 | ufrgs | Towards a multiple-ISA embedded system | |
| BT/HW/reconf | 2014 | transparent_adaptive | beck | micpro | 20 | ufrgs | A transparent and adaptive reconfigurable system | ||
| BT/HW/reconf | 2014 | virt | lo | sbesc | 0 | ufrgs | Hardware Virtualization on Coarse-Grained Reconfigurable Architectures | ||
| BT/HW/reconf | 2014 | bt_for_cgra | mai | ipdps | 1 | unist | Efficient Software-Based Runtime Binary Translation for Coarse-Grained Reconfigurable Architectures | ||
| BT/HW/reconf | 2016 | analysis_parallelism | brandalero | daes | 3 | ufrgs | potential analysis of a superscalar core employing a reconfigurable array for improving instruction-level parallelism | ||
| BT/HW/reconf | 2016 | heterogeneous | souza | date | 24 | ufrgs | A Reconfigurable Heterogeneous Multicore with a Homogeneous ISA | ||
| BT/HW/reconf | 2016 | sched | souza | arc | 0 | ufrgs | Evaluating Schedulers in a Reconfigurable Multicore Heterogeneous System | ||
| BT/HW/reconf | 2016 | dbt_for_cgra | watkins | hpca | 14 | lafayette | Software Transparent Dynamic Binary Translation for Coarse-Grain Reconfigurable Architectures | ||
| BT/HW/reconf | 2017 | reuse_repeated_decode | brandalero | date | 15 | ufrgs | A Mechanism for Energy-efficient Reuse of Decoding and Scheduling of x86 Instruction Streams | ||
| BT/HW/VLIW | 1999 | bao | sathaye | 29 | ibm | BOA: Targeting Multi-Gigahertz with Binary Translation | |||
| BT/HW/VLIW | 2000 | boa | gschwind | computer | 113 | ibm | daisy后继者boa | Dynamic and transparent binary translation | |
| BT/HW/VLIW | 2015 | denver | nvidia | micro | 36 | ||||
| BT/HW/VLIW | 2019 | hybrid_dbt | rokicki | tcad | 2 | rennes | Hybrid-DBT: Hardware/Software Dynamic Binary Translation Targeting VLIW | ||
| BT/HW/VLIW/crusoe | 2000 | transmeta | halfhill | transmeta | TRANSMETA BREAKS X86 LOW-POWER BARRIER | ||||
| BT/HW/VLIW/crusoe | 2000 | crusoe | klaiber | transmeta | 118 | transmeta | |||
| BT/HW/VLIW/crusoe | 2003 | code_morph | dehnert | cgo | 325 | transmeta | |||
| X | BT/HW/VLIW/crusoe | 2014 | v-isa | dhaskat | 0 | V-ISA use in Transmeta Crusoe Processor | |||
| BT/HW/VLIW/daisy | 1998 | daisy | ebcioglu | iccd | 32 | ibm | An Eight-Issue Tree-VLIW Processor for Dynamic Binary Translation | ||
| BT/HW/VLIW/daisy | 2000 | daisy | altman | 2 | ibm | Full System Binary Translation: RISC to VLIW | |||
| BT/HW/VLIW/daisy | 2000 | daisy_dbt_sys_debug | altman | 5 | ibm | Simulation and Debugging of Full System Binary Translation | |||
| W | BT/HW/VLIW/daisy | 2000 | arch_convergence | gschwind | ics | 19 | ibm | 好像“融合指令集”，笑 | Binary translation and architecture convergence issues for IBM system/390 |
| BT/HW/VLIW/daisy | 2001 | daisy | ebcioglu | tc | 138 | ibm | Dynamic binary translation and optimization | ||
| BT/kernel | 2012 | instrument | feiner | asplos | 54 | toronto | Comprehensive kernel instrumentation via dynamic binary translation | ||
| BT/kernel | 2012 | light_weight | lee | icuimc | 0 | skku | DyKA: Light-weight Dynamic Kernel Analyzing Framework Based on Binary Translation Method | ||
| W | BT/kernel | 2013 | fast | kedia | sosp | 18 | iitd | 不翻译用户指令，非首创 | Fast Dynamic Binary Translation for the Kernel |
| BT/kernel | 2013 | light_weight | lee | tjsc | 3 | skku | Light-weight kernel instrumentation framework using dynamic binary translation | ||
| W | BT/lift | 2010 | x86_to_c | makankov | iccit | 0 | ku | Implementation of x86 Binary-to-C Translator by Using GNU Tools | |
| W | BT/lift | 2018 | rnn_snippet | katz | saner | 20 | cmu | lift snippet by RNN | Using Recurrent Neural Networks for Decompilation |
| W | BT/lift/IR | 2015 | learn_compiler | hasabnis | amasbt | 5 | sbu | Automatic Generation of Assembly to IR Translators Using Compilers | |
| BT/lift/IR | 2017 | arm_to_llvm | shigenobu | 5 | utsunomiya | A Translation Method of ARM Machine Code to LLVM-IR for Binary Code Parallelization and Optimization | |||
| BT/lift/IR/mcsema | 2019 | mcsema_dyninst | korencik | ||||||
| BT/lift/IR/mctoll | 2019 | mctoll | yadavalli | lctes | 5 | microsoft | Raising Binaries to LLVM IR with MCTOLL (WIP Paper) | ||
| BT/lift/IR | 2020 | instrew_llvm | engelke | vee | 3 | tum | Instrew: leveraging LLVM for high performance dynamic binary instrumentation | ||
| BT/lift/IR | 2020 | runtime_llvm_opt | engelke | 0 | tum | Robust Practical Binary Optimization at Run-time using LLVM | |||
| BT/lift/IR/LLBT | 2012 | llbt | bor-yeh | cases | 31 | 台交大 | |||
| BT/lift/IR/LLBT | 2013 | auto_validation | chen | applc | |||||
| BT/lift/IR/LLBT | 2014 | llbt | bor-yeh | taco | 15 | 台交大 | |||
| BT/lift/IR/LLBT | 2014 | llbt | 沈柏晔 | doc_thesis | 台交大 | ARM架構下可重定目標二元碼轉譯器之研究 | |||
| BT/lift/IR/REVNG | 2017 | revng | federico | picc | 39 | ||||
| BT/lift/IR/REVNG | 2018 | revng | federico | iccst | 3 | ||||
| BT/lift/IR/REVNG | 2019 | revng | gussoni | 1 | |||||
| BT/Mem | 2008 | thread_safe_by_tm | chung | hpca | 51 | stanford | Thread-safe dynamic binary translation using transactional memory | ||
| W | BT/Mem/atomic | 2010 | atomicity_opt | borin | cgo | 12 | intel | TAO: Two-level Atomicity for Dynamic Binary Optimizations | |
| BT/Mem/atomic | 2016 | atomic | rigo | ecms | 6 | ||||
| BT/oldProj | 1993 | mips2alphaaxp | sites | cacm | 267 | Binary Translation | |||
| BT/oldProj | 1995 | tibbit | cogswell | 4 | cmu | Parallel and Distributed Real-Time Systems | |||
| BT/oldProj | 1997 | fx32 | hookway | dtj | 147 | DIGITAL FX!32: Combining Emulation and Binary Translation | |||
| BT/oldProj | 1998 | fx32 | chernoff | micro | 217 | FX!32 A Profile-Directed Binary Translator | |||
| BT/oldProj | 1999 | dynamo | bala | 103 | Transparent Dynamic Optimization: The Design and Implementation of Dynamo | ||||
| BT/oldProj | 2000 | dynamo | bala | pldi | 514 | ||||
| BT/oldProj | 2002 | walkabout | cifuentes | 63 | sun | Walkabout: A Retargetable Dynamic Binary Translation Framework | |||
| BT/oldProj | 2003 | ia32el | baraz | micro | 291 | 到itanium, super block opt | IA-32 Execution Layer: a two-phase dynamic translator designed to support IA-32 applications on Itanium®-based systems | ||
| BT/oldProj | 2004 | rabit | pramanik | anss | 1 | buffalo | RABIT: A New Framework for Runtime Emulation and Binary Translation | ||
| BT/others | 1996 | reverse_engineer_env | cifuentes | wcre | 15 | uq | tegrated Reverse Engineering Environment of Binary Code | ||
| BT/others | 2005 | tdb_debugger | kumar | 13 | pitt | Tdb: a source-level debugger for dynamically translated programs | |||
| BT/others | 2010 | behave_control | sakai | saint | 0 | kyushuu | Behavior Control based on Dynamic Code Translation | ||
| BT/others | 2011 | cmp_intel_transmeta | ottoni | cf | 4 | intel | AstroLIT: Enabling Simulation-based Microarchitecture Comparison Between Intel and Transmeta Designs | ||
| BT/overview | 1996 | static_dynamic_retarget | cifuentes | icsm | 66 | uq | Binary translation: static, dynamic, retargetable? | ||
| BT/overview | 2000 | chances | altman | 88 | Welcome to the Opportunities of Binary Translation | ||||
| BT/overview | 2001 | bt_opt_challenges | altman | pieee | 38 | ||||
| BT/overview | 2003 | dbt_overview | mark | ukuug | 23 | ||||
| BT/QEMU | 2005 | qemu | bellard | usenix | 2217 | ||||
| BT/QEMU | 2017 | qemu_multi_cores | cota | cgo | 8 | ||||
| BT/QEMU/target | 2018 | xilinx_microblaze | yarza | rapido | 1 | offis | Real-Time Capable Retargeting of Xilinx MicroBlaze Binaries using QEMU A Feasibility Study | ||
| BT/rewrite | 2011 | runtime_vectorize | nakamura | 8 | tsukuba | Automatic Vectorization by Runtime Binary Translation | |||
| BT/rewrite | 2012 | verify_by_dbt | becker | dsn | 8 | paderborn | Binary Mutation Testing Through Dynamic Translation | ||
| BT/rewrite | 2012 | lldsal | payer | dsal | 4 | ethz | 为BT的底层语言，需编译到客户程序 | LLDSAL: a low-level domain-specific aspect language for dynamic code-generation and program modification | |
| BT/rewrite | 2013 | static_no_extra_info | smithson | wcre | 32 | umd | Static Binary Rewriting without Supplemental Information | ||
| BT/rewrite | 2017 | ramblr | wang | ndss | 71 | ucsb | Ramblr: Making Reassembly Great Again | ||
| BT/rewrite | 2018 | superset_disassembly | bauman | ndss | 40 | utdallas | Superset Disassembly: Statically Rewriting x86 Binaries Without Heuristics | ||
| W | BT/rewrite | 2019 | intro | wenzl | csur | 16 | From hack to elaborate technique - A survey on binary rewriting | ||
| BT/rewrite | 2019 | parallel_opt | zhou | vee | 2 | cam | The Janus triad: Exploiting parallelism through dynamic binary modification | ||
| BT/rewrite/instru | 2005 | pin | luk | pldi | 3914 | intel | Pin: building customized program analysis tools with dynamic instrumentation | ||
| BT/rewrite/instru | 2009 | mt | hazelwood | ismm | 28 | ||||
| BT/rewrite/instru | 2018 | partial_bt | haber | systor | 0 | intel | Chaperone - Runtime System for Instrumenting Applications via Partial Binary Translation | ||
| ? | BT/rewrite/instru | 2019 | by_qemu | cota | vee | 5 | columbia | 三个不相关的事情？ Fpu opt, multicore opt, instrument |
Cross-ISA machine instrumentation using fast and scalable dynamic binary translation |
| W | BT/rewrite/instru | 2020 | static | dinesh | snp | 31 | purdue | RetroWrite: Statically Instrumenting COTS Binaries for Fuzzing and Sanitization | |
| BT/security | 2010 | malware_detect | guo | 26 | ndsc | HERO: A novel malware detection framework based on binary translation | |||
| BT/security | 2011 | syscall | payer | vee | 63 | ethz | Fine-grained user-space security through virtualization | ||
| BT/security | 2020 | timing_side_channel | napoli | 0 | unicamp | Evaluation and Mitigation of Timing Side-Channel Leakages on Multiple-Target Dynamic Binary Translators | |||
| BT/static | 1999 | uqbt | cifuentes | wcre | 46 | uq | The design of a resourceable and retargetable binary translator | ||
| BT/static | 2000 | uqbt | van | 112 | UQBT: Adaptable Binary Translation at Low Cost | ||||
| BT/static | 2002 | virtual_method_detect | troger | wcre | 18 | uq | Analysis of virtual method invocation for binary translation | ||
| BT/static | 2006 | sbt | angelone | 1 | |||||
| BT/static | 2008 | arm_sbt | jiunn-yeu | odes | 16 | ||||
| X | BT/static | 2018 | riscv | lupori | hpcs | 3 | unicamp | 难点都没解决，如简介跳转 | Towards a High-Performance RISC-V Emulator |
| BT/sys | 2010 | embed | kondoh | vee | 11 | ibm | Dynamic binary translation specialized for embedded systems | ||
| BT/sys | 2011 | multicore | almer | 23 | ed | Scalable Multi-Core Simulation Using Parallel Dynamic Binary Translation | |||
| BT/sys | 2013 | multicore | almer | ijpp | 4 | ed | A Parallel Dynamic Binary Translator for Efficient Multi-Core Simulation | ||
| BT/sys | 2013 | ppc_java | kumar | 2 | ibm | Experiences with Dynamic Binary Translation in a Full System Simulator | |||
| BT/sys | 2016 | armv7 | penneman | jsa | 6 | ugent | Evaluation of dynamic binary translation techniques for full system virtualisation on ARMv7-A | ||
| BT/sys | 2016 | async_interrupt_handle | spink | lctes | 1 | ed | Efficient asynchronous interrupt handling in a full-system instruction set simulator | ||
| BT/sys | 2019 | dbtor_for_embed | salgado | icit | 2 | uminho | DBTOR: A Dynamic Binary Translation Architecture for Modern Embedded Systems | ||
| BT/Tarmac | 2001 | report | sharp | 2 | A Dynamically Recompiling ARM Emulator | ||||
| BT/test | 2014 | code_coverage | guo | date | 0 | 武成岗 | EATBit: Effective Automated Test for Binary Translation with High Code Coverage | ||
| BT/test | 2017 | sys_bench | wagstaff | ispass | 4 | SimBench: A Portable Benchmarking Methodology for Full-System Simulators | |||
| Build/Compiler/trans | 2004 | perform_goto | 武成岗 | 软件学报 | 0 | 武成岗 | 代码翻译中PERFORM和GOTO语句复合结构的变换 | ||
| CompatLayer | 2006 | linuxulator | divacky | freebsd | linux => freebsd | Linux® emulation in FreeBSD | |||
| CompatLayer/UML | 2006 | user_mode_linux | dike | 253 | User Mode Linux | ||||
| W | ISA | 2013 | power_of_risc_cisc | blem | hpca | 144 | |||
| W | ISA/enhance | 2015 | branch_predict | mcfarlin | isca | 8 | cmu | in_order_cpu | Branch Vanguard: Decomposing Branch Functionality into Prediction and Resolution Instructions |
| JIT | 1997 | java | cierniak | 38 | Just-in-time optimizations for high-performance Java programs | ||||
| JIT | 1997 | java_vliw_processor | ebcioglu | 37 | ibm | A JAVA ILP Machine Based on Fast Dynamic Compilation | |||
| JIT | 1997 | cacao_java_alpha | krall | 124 | CACAO - A 64 bit JavaVM Just-in-Time Compiler | ||||
| JIT | 1998 | cacao_java_efficient | krall | pact | 142 | Efficient JavaVM just-in-time compilation | |||
| JIT | 1998 | java_ia32 | tabatabai | pldi | 206 | Fast, effective code generation in a just-in-time Java compiler | |||
| JIT | 1999 | latte_java | yang | pact | 116 | LaTTe: a Java VM just-in-time compiler with fast and efficient register allocation | |||
| JIT | 2003 | intro | aycock | csur | 313 | A brief history of just-in-time | |||
| JIT | 2006 | testarossa_java | sundaresan | cgo | 52 | Experiences with Multi-threading and Dynamic Class Loading in a Java Just-In-Time Compiler | |||
| JIT | 2008 | llvm_sim | brandner | 29 | Fast and Accurate Simulation using the LLVM Compiler Framework | ||||
| JIT | 2011 | llvm_sim | helmstetter | imecs | 6 | Fast Instruction Set Simulation Using LLVM-based Dynamic Translation | |||
| JIT | 2018 | hhvm_php | ottoni | pldi | 19 | HHVM JIT: A Profile-Guided, Region-Based Compiler for PHP and Hack | |||
| JIT/opt | 2000 | jvm_profile | whaley | 142 | A portable sampling-based profiler for Java virtual machines | ||||
| JIT/opt | 2001 | lazy_background | krintz | spe | 70 | Reducing the overhead of dynamic compilation | |||
| JIT/opt | 2003 | region_based | suganuma | pldi | 61 | A Region-Based Compilation Technique for a Java Just-In-Time Compiler | |||
| JIT/opt | 2004 | exception_handling | lee | spe | 31 | Efficient Java Exception Handling in Just-in-Time Compilation | |||
| JIT/opt | 2009 | js_trace_based | gal | pldi | 342 | Trace-based just-in-time type specialization for dynamic languages | |||
| JIT/opt | 2009 | js_trace_based | ha | 28 | A Concurrent Trace-based Just-In-Time Compiler for JavaScript | ||||
| JIT/opt | 2011 | from_method_to_trace | inoue | cgo | 66 | A Trace-based Java JIT Compiler Retrofitted from a Method-based Compiler | |||
| JIT/opt | 2011 | java_multicore | kulkarni | oopsla | 31 | JIT Compilation Policy for Modern Machines | |||
| JIT/opt | 2011 | trace_saving_space | wu | oopsla | 9 | Reducing trace selection footprint for large-scale Java applications without performance loss | |||
| JIT/opt | 2019 | low_latency | kristien | vee | 0 | ed | Mitigating JIT Compilation Latency in Virtual Execution Environments | ||
| Kernel/exo | 1995 | intro | engler | sosp | 1259 | Exokernel: An Operating Application-Level System Architecture Resource Management | |||
| Kernel/Linux | 2002 | rcu | mckenney | 216 | READ-COPY UPDATE: USING EXECUTION HISTORY TO SOLVE CONCURRENCY PROBLEMS | ||||
| Kernel/Linux | 2016 | sched_bug | lozi | eurosys | 120 | The Linux Scheduler: a Decade of Wasted Cores | |||
| Kernel/Linux | 2020 | rcu | mckenney | RCU Usage In the Linux Kernel: Eighteen Years Later | |||||
| Kernel/micro | 1995 | u_kernel | lietdke | sosp | 308 | On u-Kernel Construction | |||
| Kernel/micro | 2013 | l3_sel4 | elphinstone | sosp | 126 | From L3 to seL4 What Have We Learnt in 20 Years of L4 Microkernels? | |||
| Kernel/multi | 2009 | intro | baumann | sosp | 856 | The Multikernel: A new OS architecture for scalable multicore systems | |||
| Lang/IR | 1991 | ssa | cytron | toplas | 2317 | ||||
| Lang/IR | 2000 | llvm | lattner | master_thesis | 241 | ||||
| Lang/IR | 2004 | llvm | lattner | cgo | 4340 | ||||
| Lang/IR | 2013 | importance | chow | ||||||
| Lang/Lisp | 1989 | intro_sym_comp | touretzky | 32 | |||||
| Lang/SMT-LIB | 2010 | smt_lib_v2_ref | barrett | 817 | |||||
| Lang/SMT-LIB | 2012 | smt_lib_v2 | cok | 47 | |||||
| Lang/WebAsm | 2017 | intro | haas | pldi | 194 | ||||
| Lang/WebAsm | 2019 | memory_model | watt | oopsla | 6 | ||||
| Mem | 2016 | cat | alglave | 18 | Syntax and semantics of the weak consistency model specification language cat | ||||
| Mem | 2020 | consistency_test | kirkham | oopsla | 0 | Foundations of Empirical Memory Consistency Testing | |||
| Mem/model | 2017 | memalloy | wickerson | popl | 77 | test two mem model | Automatically Comparing Memory Consistency Models | ||
| Characterizing | 2004 | simpoint | hamerly | sigmetrics_per | 69 | How to Use SimPoint to Pick Simulation Points | |||
| W | Pwr | 2008 | efficiency | slca | Computer Architecture Techniques for Power-Efficiency | ||||
| Pwr | 2009 | mcpat | li | micro | 2319 | hp | McPAT: An Integrated Power, Area, and Timing Modeling Framework for Multicore and Manycore Architectures | ||
| Pwr | 2011 | mcpat | li | taco | 180 | hp | The McPAT Framework for Multicore and Manycore Architectures: Simultaneously Modeling Power, Area, and Timing | ||
| Pwr | 2015 | high_resolution | oboril | date | 13 | kit | High-Resolution Online Power Monitoring for Modern Microprocessors | ||
| Arch/Decoder | 2016 | x86_decoder | hirki | cooldc | 16 | Empirical Study of Power Consumption of x86-64 Instruction Decoder | |||
| security | 2017 | vm_mem_disclosure | wwwang | vee | 15 | 武成岗 | RERANZ: A Light-Weight Virtual Machine to Mitigate Memory Disclosure Attacks | ||
| security | 2019 | re_random | wwwang | usenix_security | 2 | 武成岗 | SafeHidden: An Efficient and Secure Information Hiding Technique Using Re-randomization | ||
| Sim | 1995 | simos | rosenblum | 528 | Complete computer system simulation: the SimOS approach | ||||
| Sim | 2002 | simplescalar_interp | austin | 1729 | SimpleScalar: an infrastructure for computer system modeling | ||||
| Sim | 2002 | simics | magnusson | 2168 | Simics: A full system simulation platform | ||||
| Sim | 2003 | smarts | wunderlich | isca | 351 | SMARTS: accelerating microarchitecture simulation via rigorous statistical sampling | |||
| Sim | 2004 | simflex | hardavellas | perv | 156 | SimFlex: a fast, accurate, flexible full-system simulation framework for performance evaluation of server architecture | |||
| Sim | 2005 | gems | martin | carn | 1612 | Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset | |||
| Sim | 2006 | giano_sw_hw_co | forin | 33 | Giano: The Two-Headed System Simulator | ||||
| Sim | 2006 | lse_high_level | vachharajani | tocs | 42 | The Liberty Simulation Environment: A Deliberate Approach to High-Level System Modeling | |||
| Sim | 2006 | simflex | wenisch | micro | 343 | SimFlex: Statistical Sampling of Computer System Simulation | |||
| Sim | 2006 | intro | yi | tc | 97 | Simulation of computer architectures: simulators, benchmarks, methodologies, and recommendations | |||
| Sim | 2007 | ptlsim_cycle_accurate | yourst | ispass | 393 | PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator | |||
| Sim | 2008 | armiss | lv | icess | 12 | ARMISS: An Instruction Set Simulator for the ARM Architecture | |||
| Sim | 2009 | cotson | argollo | opsr | 211 | COTSon: infrastructure for full system simulation | |||
| Sim | 2009 | bt_acc | gligor | 69 | tima | Using Binary Translation in Event Driven Simulation for Fast and Flexible MPSoC Simulation | |||
| Sim | 2010 | cotson | ryckbosch | micro | 21 | Fast, Accurate, and Validated Full-System Software Simulation of x86 Hardware | |||
| Sim | 2011 | marss_multicore | patel | dac | 382 | MARSSx86: A Full System Simulator for x86 CPUs | |||
| Sim | 2014 | error_analysis | gutierrez | ispass | 110 | Sources of error in full-system simulation | |||
| Sim | 2017 | bt_sampling | kumar | ispass | 2 | amd | DARTS: Performance-Counter Driven Sampling Using Binary Translators | ||
| Distro/Nix | 2006 | intro | dolstra | phd_thesis | 128 | The Purely Functional Software Deployment Model | |||
| Temp | 2006 | quantum_comp | slca | Quantum Computing for Computer Architects | |||||
| Temp | 2006 | transactional_mem | slca | Transactional Memory | |||||
| Temp | 2009 | fault_tolerant_arch | slca | Fault Tolerant Computer Architecture | |||||
| Temp | 2009 | on_chip_networks | slca | On-Chip Networks | |||||
| Temp | 2009 | reconf_supercomp | slca | Introduction to Reconfigurable Supercomputing | |||||
| Temp | 2009 | datacenter_design | slca | The Datacenter as a Computer An Introduction to the Design of Warehouse-Scale Machines | |||||
| W | Temp | 2010 | arch_perf_eval | slca | Computer Architecture Performance Evaluation Methods | ||||
| Temp | 2010 | transactional_mem | slca | Transactional Memory 2nd edition | |||||
| Temp | 2010 | uarch | slca | Processor Microarchitecture An Implementation Perspective | |||||
| Temp | 2011 | consistency_coherence | slca | A Primer on Memory Consistency and Cache Coherence | |||||
| Temp | 2011 | multicore_cache | slca | Multi-Core Cache Hierarchies | |||||
| W | Temp | 2011 | quantum_comp | slca | Quantum Computing for Computer Architects Second Edition | ||||
| Temp | 2012 | perf_tuning_gpgpu | slca | Performance Analysis and Tuning for General Purpose Graphics Processing Units (GPGPU) | |||||
| Temp | 2013 | arch_security | slca | Security Basics for Computer Architects | |||||
| Temp | 2013 | multithread_arch | slca | Multithreading Architecture | |||||
| W | Temp | 2013 | arch_opt_model | slca | Optimization and Mathematical Modeling in Computer Architecture | ||||
| Temp | 2013 | shared_mem_sync | slca | Shared-Memory Synchronization | |||||
| Temp | 2013 | volt_var_resilient | slca | Resilient Architecture Design for Voltage Variation | |||||
| W | Temp | 2014 | fpga_acc_sim | slca | FPGA-Accelerated Simulation of Computer Systems | ||||
| Temp | 2014 | hw_prefetch | slca | A Primer on Hardware Prefetching | |||||
| Temp | 2015 | analyzing_analytics | slca | Analyzing Analytics | |||||
| Temp | 2015 | customizable_comp | slca | Customizable Computing | |||||
| W | Temp | 2015 | die_stacking_arch | slca | Die-stacking Architecture | ||||
| Temp | 2015 | hw_acc_research | slca | Research Infrastructures for Hardware Accelerators | |||||
| Temp | 2015 | mem_compression | slca | A Primer on Compression in the Memory Hierarchy | |||||
| Temp | 2015 | simd | slca | Single-Instruction Multiple-Data Execution | |||||
| W | Temp | 2017 | virtual_mem | slca | Architectural and Operating System Support for Virtual Memory | ||||
| Temp | 2017 | deep_learning | slca | Deep Learning for Computer Architects | |||||
| W | Temp | 2017 | hw_sw_virt | slca | Hardware and Software Support for Virtualization | ||||
| Temp | 2017 | on_chip_networks | slca | On-Chip Networks Second Edition | |||||
| Temp | 2017 | temporal_NN | slca | Space-Time Computing with Temporal Neural Networks | |||||
| Temp | 2018 | gpgpu_arch | slca | General-Purpose Graphics Processor Architectures | |||||
| W | Temp | 2018 | heterogeneous_compile | slca | Compiling Algorithmsfor Heterogeneous Systems | ||||
| Temp | 2018 | secure_processor_arch | slca | Principles of Secure Processor Architecture Design | |||||
| Temp | 2019 | cache_replacement | slca | Cache Replacement Policies | |||||
| ISA/Semantics | 2019 | x64_validation | dasgupta | sigplan | 24 | A Complete Formal Semantics of x86-64 User-Level Instruction Set Architecture | |||
| ISA/Semantics | 2021 | sail | armstrong | manual | The Sail instruction-set semantics specification language | ||||
| Virt | 1988 | 386 | smith | programmers_journal | |||||
| Virt | 2000 | intel_secure_vmm | robin | usenix_security | 325 | ||||
| Virt | 2002 | esx | waldspurger | opsr | 1402 | vmware | Memory Resource Management in VMware ESX Server | ||
| Virt | 2003 | xen | barham | opsr | 6475 | cam | Xen and the Art of Virtualization | ||
| Virt | 2006 | cmp_soft_hard_x86 | adams | asplos | 700 | ||||
| Virt | 2006 | intel_hw | neiger | 255 | |||||
| Virt | 2007 | dbt_hypervisors | karollil | 0 | |||||
| Virt | 2007 | kvm | kivity | 1556 | |||||
| Virt | 2012 | dune | belay | osdi | 215 | ||||
| Virt | 2013 | static_trans_vliw | hamayun | 5 | tima | Native Simulation of Complex VLIW Instruction Sets using Static Binary Translation and Hardware-Assisted Virtualization | |||
| Virt | 2013 | ppc_embed | mittal | asplos | 9 | iitd | Efficient Virtualization on Embedded platforms Power Architecture | ||
| Virt/ | 2003 | xen | paul | sosp | 5036 | Xen and the Art of Virtualization | |||
| Virt/addr_trans | 2014 | espt | chang | vee | 20 | 武成岗 | Efficient Memory Virtualization for Cross-ISA System Mode Emulation | ||
| Virt/addr_trans | 2015 | opt_qemu_sys | tong | taco | 6 | ||||
| Virt/addr_trans | 2015 | dual_tlb | wang | 0 | lx | A Dual-TLB Method for MIPS Heterogeneous Virtualization | |||
| Virt/addr_trans | 2015 | dual_tlb | wang | master_thesis | lx | 基于双TLB的二进制翻译访存加速 | |||
| Virt/addr_trans | 2015 | hspt | wang | vee | 10 | HSPT: Practical Implementation and Efficient Management of Embedded Shadow Page Tables for Cross-ISA System Virtual Machines | |||
| Virt/addr_trans | 2018 | 1_qemu_dune_2_lkm | faravelon | doc_thesis | 1 | Acceleration of memory accesses in dynamic binary translation | |||
| Virt/addr_trans | 2021 | btmmu | huang | vee | 0 | lx | BTMMU: An Efficient and Versatile Cross-ISA Memory Virtualization | ||
| Virt/BT | 2007 | magixen | chapman | 9 | MagiXen: Combining Binary Translation and Virtualization | ||||
| Virt/BT | 2016 | cross_arch_captive | spink | taco | 3 | A Retargetable System-Level DBT Hypervisor | |||
| Virt/BT | 2017 | cross_arch_captive | spink | 0 | Efficient Cross-architecture Hardware Virtualisation | ||||
| Virt/BT | 2019 | cross_arch_captive | spink | usenix | 1 | Hardware-Accelerated Cross-Architecture Full-System Virtualization | |||
| deprecated/W.Survey | 2019 | fpga_deep_learning | kaiyuan_guo | trets | 38 | ||||
| deprecated/W.Survey | 2020 | deep_conv_NN | khan | air | 250 | ||||
| IndustryReport | 2010 | compile_virt_future | bertin | dac | 9 | Compilation and Virtualization in the HiPEAC vision | |||
| ISA/Uop | 2001 | ucache | solomon | islped | 44 | Micro-Operation Cache: A Power Aware Frontend for Variable Instruction Length ISA | |||
| ISA/Uop | 2003 | ucache | solomon | tvlsi | 44 | Micro-Operation Cache: A Power Aware Frontend for Variable Instruction Length ISA | |||
| ISA/Uop | 1997 | p6_microcode | gwennap | P6 Microcode Can Be Patched | |||||
| ISA/Uop | 1990 | nec_intel | elkins | NEC v. Intel: A Guide to Using "Clean Room" Procedures as Evidence | |||||
| ISA/Uop | 2020 | improve_ucache | kotra | micro | 3 | Improving the Utilization of Micro-operation Caches in x86 Processors | |||
| ISA/Uop | 2019 | reverse_engineer | koppe | usenix_security | 16 | Reverse Engineering x86 Processor Microcode | |||
| ISA/Semantics | 2018 | sail | armstrong | 3 | Detailed Models of Instruction Set Architectures: From Pseudocode to Formal Semantics | ||||
| ISA/Uop | 2021 | inst | fog | manual | Instruction tables: Lists of instruction latencies, throughputs and micro-operation breakdowns for Intel, AMD, and VIA CPUs | ||||
| ISA/x86 | 2022 | uarch | fog | manual | The microarchitecture of Intel, AMD, and VIA CPUs | ||||
| . | Mem/model | 2012 | arm_ppc | maranget | A Tutorial Introduction to the ARM and POWER Relaxed Memory Models | ||||
| ISA/Semantics | 2015 | sail | gray | micro | 31 | An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors | |||
| ISA/Semantics | 2014 | lem | mulligan | icfp | 79 | Lem: reusable engineering of real-world semantics | |||
| ISA/Uop | 1996 | palcode | manual | PALcode for Alpha Microprocessors System Design Guide | |||||
| ISA/Semantics | 2014 | cakeml_x64 | kumar | popl | 303 | CakeML: A Verified Implementation of ML | |||
| BT | 2014 | 申威 | 刘晓楠 | doc_thesis | 面向国产处理器的二进制翻译关键技术研究 | ||||
| Algo/Graph | 2002 | inexact_match | bengoetxea | doc_thesis | 107 | Inexact Graph Matching Using Estimation of Distribution Algorithms | |||
| Algo/Graph | 1998 | distance | bunke | prl | 775 | A graph distance metric based on the maximal common subgraph | |||
| Algo/Graph | 2016 | survey | yan | icmr | 108 | A Short Survey of Recent Advances in Graph Matching | |||
| Algo/Graph | 2021 | igraphmatch | qiao | 0 | iGraphMatch: an R Package for the Analysis of Graph Matching | ||||
| ISA/Semantics | 2013 | locate | lakhotia | pprew | 75 | Fast location of similar code fragments using semantic 'juice' | |||
| Algo/Graph | 2014 | attributed | zhang | cvpr | 19 | Attributed Graph Mining and Matching: An Attempt to Define and Extract Soft Attributed Patterns | |||
| ISA/Semantics | 2016 | learn | heule | pldi | 56 | Stratified synthesis: automatically learning the x86-64 instruction set | |||
| Arch/HT | 2016 | mitigate_rop_attack | venkat | asplos | 26 | HIPStR: Heterogeneous-ISA Program State Relocation | |||
| Arch/Cache | 2022 | dsa_cache | sedaghati | isca | 0 | X-cache: a modular architecture for domain-specific caches | |||
| BT/oldProj | 1994 | shade | cmelik | sigmetrics | 750 | Shade: a fast instruction-set simulator for execution profiling | |||
| Arch/Cache | 2009 | prefetch_intro | byna | jcst | 37 | Taxonomy of Data Prefetching for Multicore Processors | |||
| BT/HW | 2022 | 协处理器 | 余子濠 | doc_thesis | 0 | 指令集模拟器的软硬件协同加速技术研究 | |||
| Build/Disassemble | 2016 | accuracy | andriesse | usenix_security | 112 | An In-Depth Analysis of Disassembly on Full-Scale x86/x64 Binaries | |||
| BT/Mem/order | 2022 | sbt_tso_weak | sprokholt | pldi | 0 | Lasagne: A Static Binary Translator for Weak Memory Model Architectures | |||
| BT/Mem/order | 2015 | cmp_and_bt | lustig | isca | 34 | ArMOR: Defending Against Memory Consistency Model Mismatches in Heterogeneous Architectures | |||
| BT/algo/indirect_jump | 2016 | indirect_jump_mambox64 | dantras | taco | 11 | Optimizing Indirect Branches in Dynamic Binary Translators | |||
| BT/algo/indirect_jump | 2007 | evaluate | hiser | cgo | 73 | Evaluating indirect branch handling mechanisms in software dynamic translation systems | |||
| Arch/HT | 2011 | multi_isa | karaki | iceac | 1 | Multiple instruction sets architecture (MISA) | |||
| Arch | 1996 | tuning_pentium_pro | papworth | micro | 147 | TUNING THE PENTIUM PRO MICROARCHIT | |||
| ISA | 2002 | ildp | kim | isca | 99 | An Instruction Set and Microarchitecture for Instruction Level Distributed Processing | |||
| ISA/Fusion | 2022 | fuse_mem | singh | micro | 0 | Exploring Instruction Fusion Opportunities in General Purpose Processors | |||
| ISA/Fusion | 2017 | bt_fuse_riscv_x86 | clark | carrv | 0 | rv8: a high performance RISC-V to x86 binary translator | |||
| BT/HW | 2020 | co_design_arm32_riscv | cheng | carrv | 0 | Efficient Multiple-ISA Embedded Processor Core Design Based on RISC-V | |||
| ISA/Generated | 1998 | subset_sum | choi | iccad | 92 | Synthesis of Application Specific Instructions for Embedded DSP Software | |||
| ISA/Generated | 2003 | near_optimal_cuts | atasu | dac | 363 | Automatic Application-Specific Instruction-Set Extensions under Microarchitectural Constraints | |||
| ISA/Generated | 2003 | near_optimal_cuts | atasu | ijpp | 363 | Automatic Application-Specific Instruction-Set Extensions under Microarchitectural Constraints | |||
| ISA/Fusion/NonExec | 2004 | profile_minigraph | bracy | micro | 69 | Dataflow Mini-Graphs: Amplifying Superscalar Capacity and Bandwidth | |||
| ISA/Fusion/NonExec | 2012 | hw_dynamic | lee | master_thesis | 0 | DYNAMIC INSTRUCTION FUSION | |||
| ISA/Generated | 2014 | overview | shrimal | 4 | Instruction Customization: A Challenge in ASIP Realization | ||||
| ISA | 2009 | density | weaver | iccd | 20 | Code Density Concerns for New Architectures | |||
| BT/Mem/order | 2023 | dbt_tso_weak | gouicem | asplos | 0 | Risotto: A Dynamic Binary Translator for Weak Memory Model Architectures | |||
| ISA/Fusion/NonExec | 2003 | macroop_sched | kim | micro | 61 | Macro-op Scheduling: Relaxing Scheduling Loop Constraints | |||
| ISA | 2000 | inst_path_coproc | chou | isca | 49 | Instruction Path Coprocessors | |||
| Emulator/gem5 | 2019 | valid_gem5_haswell | akram | pmbs | 10 | Validation of the gem5 Simulator for x86 Architectures | |||
| BT/HW | 2013 | fpga_co-design | yao | fpl | 6 | FPGA based hardware-software co-designed dynamic binary translation system | |||
| ISA/Fusion | 1994 | 3_1_alu | phillips | tc | 52 | High-Performance 3-1 Interlock Collapsing ALU's | |||
| ISA/Fusion | 2011 | softhv | deb | cf | 11 | SoftHV : A HW/SW Co-designed Processor with Horizontal and Vertical Fusion | |||
| Emulator | 2009 | zesto | loh | ispass | 126 | Zesto: A Cycle-Level Simulator for Highly Detailed Microarchitecture Exploration | |||
| ISA/x86 | 2003 | pentium_m | gochman | intel | 193 | The Intel Pentium M processor: Microarchitecture and performance | |||
| Emulator | 2013 | zsim | sanchez | isca | 487 | ZSim: fast and accurate microarchitectural simulation of thousand-core systems | |||
| Emulator | 2015 | valid_zsim | micro | ZSim Tutorial Validation | |||||
| BT/HW | 2023 | loongarch | 胡伟武 | 计研发 | 龙芯指令系统架构技术 | ||||
| BT/perf | 2015 | dynamorio_perf | nimmakayala | master_thesis | 4 | Exploring Causes of Performance Overhead During Dynamic Binary Translation | |||
| BT/perf | 2008 | dynamorio_pin_perf | ruiz | iiswc | 14 | Evaluating the impact of dynamic binary translation systems on hardware cache performance | |||
| BT/perf | 2014 | dynamorio_pin_valgrind | rodriguez | latamt | 7 | Performance Evaluation of Dynamic Binary Instrumentation Frameworks | |||
| ISA/Uop | 2021 | ucache_secret | ren | isca | 24 | I See Dead µops: Leaking Secrets via Intel/AMD Micro-Op Caches | |||
| ISA/Fusion | 2023 | 微译器融合 | 陶思成 | 本科 | 一种软硬件协同实现指令融合的方法 | ||||
| AI | 2023 | 边缘端优化 | 周盈坤 | 博开题 | 边缘端到端深度学习模型推理效率优化研究 | ||||
| OS/page_size | 2011 | multi_pgsz_vtlb | zhang | icnas | 0 | Performance Improvement for Multicore Processors Using Variable Page Technologies | |||
| OS/page_size | 2002 | multi_pgsz_linux | winwood | 22 | Multiple Page Size Support in the Linux Kernel | ||||
| OS/page_size | 1998 | multi_general | ganapathy | usenix | 59 | General Purpose Operating System Support for Multiple Page Sizes | |||
| OS/page_size | 2006 | survey_large | wienand | 3 | A survey of large-page support | ||||
| OS/page_size | 2002 | practical_subblock_tlb | navarro | osdi | 191 | Practical, transparent operating system support for superpages | |||
| OS/page_size | 1994 | 4k_64k_subblock_tlb | talluri | asplos | 253 | Surpassing the TLB performance of superpages with less operating system support | |||
| OS/page_size | 2015 | super_skewed_tlb | papadopoulou | hpca | 65 | Prediction-based superpage-friendly TLB designs | |||
| OS/page_size | 2004 | multi_pgsz_skewed_tlb | seznec | tc | 43 | Concurrent support of multiple page sizes on a skewed associative TLB | |||
| Lang/functional | 2019 | os_shortcut | douxz | sosp | 4 | ShortCut: Accelerating Mostly-Deterministic Code Regions | |||
| Characterizing | 2002 | simpoint | sherwood | asplos | 1791 | Automatically Characterizing Large Scale Program Behavior | |||
| Checkpoint | 2021 | elfies | patil | cgo | 7 | ELFies: Executable Region Checkpoints for Performance Analysis and Simulation | |||
| Checkpoint | 2022 | looppoint | sabu | hpca | 2 | LoopPoint: Checkpoint-driven Sampled Simulation for Multi-threaded Applications | |||
| Checkpoint | 2013 | pinpoints | patil | hpca_t | Deterministic PinPoints: Representative and Repeatable Simulation Region Selection with PinPlay and Sniper | ||||
| Checkpoint | 2015 | pinplay | patil | pldi_t | Using PinPlay for Reproducible Analysis and Replay Debugging | ||||
| Checkpoint | 2014 | pinpoints | patil | isca_t | PinPoints: Simulation Region Selection with PinPlay and Sniper | ||||
| Checkpoint | 2016 | pinplay | patil | pldi_t | Using PinPlay for Reproducible Analysis and Replay Debugging | ||||
| Checkpoint | 2022 | looppoint_elfies | sabu | isca_t | LoopPoint and ELFies: Tools and Techniques to Accelerate Simulations of Multi-threaded Applications using Checkpointing | ||||
| Checkpoint | 2014 | pinballs | patil | reproduce | 10 | Pinballs: Portable and Shareable User-level Checkpoints for Reproducible Analysis and Simulation | |||
| Checkpoint | 2004 | pinpoints | patil | micro | 323 | Pinpointing Representative Portions of Large Intel® Itanium® Programs with Dynamic Instrumentation | |||
| BT/rewrite/instru | 2007 | jit | olszewski | eurosys | 34 | JIT Instrumentation - A Novel Approach To Dynamically Instrument Operating Systems | |||
| BT/lift | 2020 | binrec | altinay | eurosys | 21 | BinRec: dynamic binary lifting and recompilation | |||
| ISA/Uop | 2020 | ucache | amd | patent | OPERATION CACHE | ||||
| ISA/Uop | 2009 | uop_in_mem | santana | tc | 0 | DIA: A Complexity-Effective Decoding Architecture | |||
| BT/algo/indirect_jump | 2020 | mambo | callaghan | vee | 1 | Optimising Dynamic Binary Modification across 64-bit Arm Microarchitectures | |||
| Arch/Analysis | 2014 | top_down | yasin | ispass | 232 | A Top-Down Method for Performance Analysis and Counters Architecture | |||
| BT/perf | 2020 | dynamorio_overhead | dey | master_thesis | 0 | Analysis of Performance Overheads in DynamoRIO Binary Translator | |||
| BT/algo/indirect_jump | 2011 | indirect_jump | hiser | taco | 76 | Evaluating indirect branch handling mechanisms in software dynamic translation systems | |||
| BT/rewrite/instru | 2004 | dynamorio | bruening | doc_thesis | 421 | Efficient, transparent, and comprehensive runtime code manipulation | |||
| BT/rewrite/instru | 2007 | valgrind | nethercote | pldi | 2619 | Valgrind: a framework for heavyweight dynamic binary instrumentation | |||
| IndustryReport/Chip | 2009 | 25_microchips | santo | spectrum | 25 | 25 microchips that shook the world | |||
| BT/HW/VLIW/crusoe | 2000 | transmeta | geppert | spectrum | 38 | Transmeta's magic show | |||
| Vulnerability | 2008 | reversi | wagner | iccd | 54 | Reversi: Post-silicon validation system for modern microprocessors | |||
| Arch/PRF | 2017 | survey | mittal | ccpe | 15 | A survey of techniques for designing and managing CPU register file | |||
| Distro/Nix | 2006 | nixos | hemel | master_thesis | NixOS: the Nix based operating system | ||||
| Arch/Issue | 1996 | quantify_complexity | palacharla | 123 | Quantifying the Complexity of Superscalar Processors | ||||
| Arch/Issue | 1997 | complexity | palacharla | isca | 923 | Complexity-effective superscalar processors | |||
| BT | 2023 | llvm_feedback | yang | appt | 0 | MFHBT: Hybrid Binary Translation System with Multi-stage Feedback Powered by LLVM | |||
| Arch/Issue | 2000 | pipeline_schedule | stark | micro | 137 | On Pipelining Dynamic Instruction Scheduling Logic | |||
| W | JIT | 2006 | java_jni_bridge | chen | cgo | 6 | Java JNI Bridge: a framework for mixed native ISA execution | ||
| BT | 2015 | replay | kedia | doc_thesis | 0 | Efficient Deterministic Replay through Dynamic Binary Translation | |||
| BT/rewrite/instru | 2007 | pinos | bungale | vee | 102 | PinOS: A Programmable Framework for Whole-System Dynamic Instrumentation | |||
| Emulator | 2020 | cache_survey | brais | csur | 12 | A Survey of Cache Simulators | |||
| Debug | 2017 | record_replay | ocallahan | usenix | 73 | Engineering Record And Replay For Deployability | |||
| Emulator/gem5 | 2020 | gem5_20 | lowe-power | arxiv | 159 | The gem5 Simulator: Version 20.0+ | |||
| Emulator/gem5 | 2023 | profiling_gem5 | umeike | ispass | 2 | Profiling gem5 Simulator | |||
| ISA/riscv | 2011 | riscv-c | waterman | master_thesis | 13 | Improving Energy Efficiency and Reducing Code Size with RISC-V Compressed | |||
| ISA/riscv | 2016 | riscv | waterman | doc_thesis | 100 | Design of the RISC-V Instruction Set Architecture | |||
| BT/HW | 2022 | la软件生态建设 | 胡伟武 | 信息通信 | 龙芯指令系统架构及其软件生态建设 | ||||
| Arch/Decoder | 2015 | shrink_encoding_recycle | lopes | isca | 19 | unicamp | SHRINK: Reducing the ISA Complexity Via Instruction Recycling | ||
| Mem/model | 2010 | x86_tso | sewell | cacm | 379 | x86-TSO: a rigorous and usable programmer's model for x86 multiprocessors | |||
| Characterizing | 2007 | uarch_independent | hoste | micro | 186 | Microarchitecture-Independent Workload Characterization | |||
| BT/analysis | 2024 | btbench | li | ispass | 0 | 龙芯 | BTBench: A Benchmark for Comprehensive Binary Translation Performance Evaluation | ||
| BT/overview | 2024 | bt_survey | 谢汶兵 | 软件学报 | 二进制翻译技术综述 | ||||
| SoC/c910 | 2020 | xt910 | chen | isca | 64 | Xuantie-910 A Commercial Multi-Core 12-Stage Pipe e Out-of-Order 64-bit High Performance RISC-V Processor | |||
| GPU | 2023 | riscv_skybox | tine | asplos | 2 | Skybox: Open-Source Graphic Rendering on Programmable RISC-V GPUs | |||
| GPU | 2021 | riscv_vortex | tine | micro | 19 | Vortex: Extending the RISC-V ISA for GPGPU and 3D-Graphics | |||
| BT/overview | 2024 | dbt_survey | 张锦 | 计科探 | 动态二进制翻译技术综述 | ||||
| BT/libWrap | 2019 | lib | 傅立国 | 计研发 | 动态二进制翻译中库函数处理的优化 |